1. Field of the Invention
The present invention relates to radio frequency frontends and analog baseband parts in wireless receivers that support cellular standards such as LTE, triple-carrier WCDMA, for instance.
2. Description of the Related Art
Full duplex radio frequency (RF) transceivers are capable of transmitting and receiving radio signals simultaneously at different frequencies. FIG. 1 shows a transceiver 100 that transmits and receives radio frequency signals through one or more connected antennas 102 and connects via digital interfaces to a modulator/demodulator (modem) 140. Transceiver 100 and modem 140 may be integrated together with display 182, keypad 184, loudspeaker 186, microphone 188 and chipset 180 into a mobile wireless device 189 such as a mobile phone. Other applications of radio frequency transceivers include use in base stations or machine-to-machine communications such as vending machines or cash registers, for example.
Transceiver 100 comprises a transmitter and a receiver. The receiver processes a received radio frequency signal that is picked up by antenna 102 and converts it to a down-sampled received signal 138. The received radio frequency signal comprises a wanted signal component, for example encoded speech data in a voice call that is decoded and sent to loudspeaker 186. The transmitter converts a digital data stream 145 that may for example encode voice data from microphone 188 to a radio frequency signal that is transmitted by antenna 102.
In the receiver, a radio frequency input signal from antenna 102 is coupled to duplex filter 108, where only a predetermined receive band frequency range passes through to receive path signal 110. Receive path signal 110 is amplified by low-noise amplifier 112 and down-converted into baseband signal 126 by receive path mixer 114 using receiver local oscillator signal 116.
Receiver local oscillator signal 116 is generated at a received channel frequency by receiver synthesizer 118 based on a reference clock 120, and may comprise an in-phase component and a quadrature component.
Receive path mixer 114 may implement quadrature down-conversion using a pair of mixers, providing an in-phase and a quadrature component of baseband signal 126.
Baseband signal 126 is filtered by analog baseband filter 128, and the resulting filtered baseband signal 130 is sampled by analog-to-digital converter (ADC) 132 using an ADC sampling clock signal 170 that is provided by ADC sampling clock generator 172 at an ADC conversion rate, resulting in sampled received signal 134. Analog baseband filter 128 may comprise an in-phase branch and a quadrature branch. Also ADC 132 may comprise an in-phase branch and a quadrature branch.
A first sample-rate converter 136 converts sampled received signal 134 into down-sampled received signal 138 at a lower sampling rate. Down-sampled received signal 138 is provided to modem 140.
In the transmitter, digital transmit signal 145 is provided by modem 140 to transceiver 100, where it is converted to a higher sample rate in second sample-rate converter 146, converted to an analog signal in digital-to-analog converter (DAC) 148 using a DAC sampling clock signal that is provided by DAC sampling clock generator 162, low-pass filtered by transmit baseband filter 150 into transmit baseband signal 152, up-converted to radio frequency by transmit mixer 154 using a transmitter local oscillator signal, and amplified by transmit amplifier 158 resulting in transmit signal 106. Transmit signal 106 is coupled by the duplex filter 108 to antenna 102.
The transmitter local oscillator signal is generated at a transmitted channel frequency by transmit synthesizer 156 from reference clock 120 and may comprise an in-phase and a quadrature component.
Reference clock 120 may be generated by a reference crystal oscillator 122. Reference crystal oscillator 122 may be connected to a temperature compensation unit 124. Temperature compensation unit 124 may comprise a temperature sensor that can be queried through bus interface 190a, and offset circuitry for reference crystal oscillator 122 that can be controlled through bus interface 190a, for example by CPU 192. Temperature compensation unit 124 may also autonomously measure the temperature and apply offset correction to reference crystal oscillator 122.
The transmit signal 106 is generated at a sufficiently high power level for transmission, for example 24 dBm at the antenna 102. A part of transmit signal 106 leaks into the receive path signal 110 due to unwanted coupling mechanism 160, resulting in an unwanted signal component known as “transmit leakage”. Unwanted coupling mechanism 160 may be caused by finite attenuation of duplex filter 108 or parasitic coupling between lines on a printed wiring board, for example. The transmit leakage is processed by the receive path, appearing at the input of analog-to-digital converter 132 at a frequency offset relative to the wanted signal component. Depending on the frequency offset and the ADC conversion rate, the transmit leakage may result in an alias component created by ADC 132.
FIG. 2a shows a spectrum of signals at the input of analog baseband filter 128 in FIG. 1 on a frequency axis. A wanted signal component 200 falls into a pass-band 202 of a frequency response 204 of analog baseband filter 128 in FIG. 1. A transmit leakage component 206 is attenuated by a stop-band gain 208 of frequency response 204.
FIG. 2b shows the output of analog baseband filter 128 which appears as input signal to ADC 132. Even after attenuation by analog baseband filter 128, the attenuated transmit leakage component 210 still carries considerably higher power than wanted signal component 200 and substantially overlaps alias response 212 around a conversion rate 216. Alias response 212 is caused by sampling within ADC 132, causing signal components near the Nyquist frequency to fold back and appear as replicas in the sampled signal. The resulting alias component 214 overwhelms the weak wanted signal component 200 and disrupts reception.
FIG. 2c shows a first solution, where analog baseband filter 128 implements a higher order frequency response 204′ with an increased stop-band attenuation 208′. In FIG. 2d, the attenuated transmit leakage component 210′ appears at such a low power level due to the increased stop-band attenuation 208′ that its alias component 214′ in FIG. 2d does not significantly deteriorate reception. Disadvantages to using a higher order frequency response are an increased current consumption of analog baseband filter 128 and an increased sensitivity of a higher order analog baseband filter to process and temperature variations that may lead to a general reduction in the received signal quality at modem 140.
FIGS. 2e and 2f illustrate a second solution, where the conversion rate 216″ has been increased to more the alias response 212″ towards higher frequencies, avoiding substantial overlap with attenuated transmit leakage component 210. The resulting alias component 214″ occupies a different frequency range than the wanted signal component 200 and can be separated by a later processing stage using digital filtering, for example. In FIG. 2f, alias component 214″ and wanted signal component 220 are substantially non-overlapping. A disadvantage of the solution is that it is difficult or impossible to guarantee correct operation of the ADC at the increased conversion rate 216″ under all conditions, as FIG. 2g illustrates in the following.
FIG. 2g shows the achievable maximum sampling rate of an ADC, such as ADC 132 in FIG. 1, depending on variations of the semiconductor process and temperature.
Transceiver 100 in FIG. 1 may be integrated partly or in whole in a radio frequency integrated circuit (RFIC) on a semiconductor process such as a 32 nm CMOS (complementary metal-oxide-semiconductor) process. Typically, duplex filter 108 and transmit amplifier 158, also known as “power amplifier”, may be connected as external components to the RFIC.
The parameters of the semiconductor process may vary considerably as a result of many contributing factors, for example the production batch, operating temperature, circuit aging and even the location of each RFIC die on a CMOS production wafer. Coping with the expected parameter variations is a significant challenge in RFIC circuit design, where the goal is to design circuitry that works reliably for the widest possible range of parameter variations. ADC 132 is among the most challenging circuit blocks to design, and it may be impossible to achieve a sufficiently high conversion rate (also known as sampling rate) over all parameter variations. The statistic distribution of parameter variations tends to result in a bell-shaped, long-tailed probability curve for circuit performance that forces designers to rely on a rather low guaranteed conversion rate, while the maximum conversion rate that can be achieved with ADC 132 in the vast majority of cases is markedly higher.
Trace 250 in FIG. 2g illustrates the guaranteed conversion rate of an ADC, which is near 52 MHz. In comparison, the “nominal” performance in trace 252 that can be reached by the majority of manufactured ADCs, is over 58 MHz at room temperature, which is a 10% increase over guaranteed performance. Since the ADC is among the most difficult components to design, a 10% increase in performance is valuable and may notably improve the performance of the receiver. An “outstanding” manufactured ADC achieves the 58 MHz conversion rate over the whole temperature range, according to trace 254 and is capable of even higher rates at room temperature.
Conventionally, radio transceivers are designed for the guaranteed minimum performance of the components, for example based on trace 250 in FIG. 2g. Since the majority of manufactured ADCs will be able to perform better under most circumstances (room temperature), this is inefficient.